Developed a flexible cache simulator which implemented L1 cache, its Victim cache and L2 cache. Analyzed the performance of various memory hierarchy configurations with varying parameters and ...

In a computer, the entire memory can be separated into different levels based on access time and capacity. Figure 1 shows different levels in the memory hierarchy. Smaller and faster memories are kept ...

Exponential increases in data and demand for improved performance to process that data has spawned a variety of new approaches to processor design and packaging, but it also is driving big changes on ...