Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More Synopsys announced its plans for expanding its processor intellectual ...
MIPS, a GlobalFoundries company, today unveiled details of the MIPS S8200 processor IP to enable next-generation AI workloads ...
Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More SiFive, a pioneer of processors based on RISC-V computing, unveiled its ...
[RetroBytes] nicely presents the curious history of the SPARC processor architecture. SPARC, short for Scalable Processor Architecture, defined some of the most commercially successful RISC processors ...
Bao Yungang, vice director of the Chinese Academy of Sciences' Institute of Computing Technology and chief scientist at the Beijing Open Source Chip Academy, predicts RISC-V will become the world's ...
The new SiFive Performance P870-D continues the journey for the company from its regular P870, which had a six-wide out-of-order core with an RVA23 profile of the RISC-V instruction set architecture ...
Today, if you want to build a high-performance computing device, you can almost certainly find all the software you need in a free and open form. The same is not true for the processor chips that run ...
Last month, a team of Google security researchers released a tool that can modify microcode of AMD's processors based on the Zen microarchitecture, the Zentool. While this is a security vulnerability, ...
GOTHENBURG, Sweden--(BUSINESS WIRE)--Under a contract with the European Space Agency (ESA), Frontgrade Gaisler is designing a new RISC-V processor tailored to meet the requirements of microcontrollers ...
Andes Technology Corp. has launched a functional safety RISC-V processor, the AndesCore D45-SE, with ISO 26262 Automotive Safety Integrity Level D (ASIL-D) certification. The processor addresses a ...
The semiconductor industry increasingly needs more flexible and scalable processor architectures, driving the growing adoption of RISC-V. Originally developed at the University of California, Berkeley ...
In a previous post, we considered how you could create an optimized ISA for a domain-specific processor core by profiling software and experimenting with adding/removing instructions. Using the open ...