The Efinity RISC-V Embedded Software IDE from Efinix is an Eclipse-based integrated development environment (IDE) powered by Ashling’s RiscFree IDE. Efinity IDE offers intuitive development and ...

The open-source nature of RISC-V brings the benefits of a modular and royalty-free instruction set architecture (ISA) that eliminates licensing fees, can accelerate development, and fosters ...

RISC-V supported standard extensions. Hints to help the compiler make better decisions. Reasons why to avoid writing "clever code." 1. These are the standard ...

If you wanted to make a CPU, and you’re not AMD or Intel, there are two real choices: ARM and RISC-V. But what are the differences between the two, and why do companies choose one over the other?

What is RISC-V? The basics of RISC-V. Applications and uses of RISC-V. RISC-V is described as an open standard instruction set architecture (ISA) that's based on the reduced instruction set computer ...

How far can a RISC-V design be pushed and still be compliant? The answer isn’t always black-and-white because the RISC-V concept is very different from previous open-source projects. But as interest ...

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...

Over the holiday break, the footage from the recent “RISC-V Summit” was posted for the world to see, and would you believe that Google showed up to profess its love for the up-and-coming CPU ...