EDN

MoSys applies 1T-SRAM to TSMC’s 90-nm process for smallest cell yet

SUNNYVALE, Calif. — MoSys Inc. today announced it has extended its collaboration with Taiwan Semiconductor Manufacturing Co. Ltd. to include the company's one-transistor SRAM cell technology in TSMC's ...
EDN

Renesas Technology Releases “superSRAM” 16-Mbit Low-Power SRAM, Achieving World’s Smallest Chip Size through Development of New Type of Memory Cell

SAN JOSE, Calif.–Sept. 11, 2003–Renesas Technology America, Inc., a U.S. subsidiary of the joint-venture company of Hitachi, Ltd. and Mitsubishi Electric Corporation, announced the commercial ...
Semiconductor Engineering

Overcoming Challenges In Next-Generation SRAM Cell Architectures

Static Random-Access Memory (SRAM) has been a key element for logic circuitry since the early age of the semiconductor industry. The SRAM cell usually consists of six transistors connected to each ...
Electronic Design

Crolles2 Alliance reveals ultra-dense SRAM cell in 45 nm conventional bulk CMOS

The Crolles2 Alliance, which includes Freescale Semiconductor, Philips and STMicroelectronics, has created six-transistor SRAM-bit cells with an area of less than 0.25 square microns, or about half ...
TechRepublic

Design and Verification of Low Power SRAM Using 8T SRAM Cell Approach

SRAM cell stability will be a primary concern for future technologies due to variability and decreasing power supply voltages. Advances in chip designing have made possible the design of chips at high ...